| Enumerator |
|---|
| ZRTOS_VFS_MODULE_SPI_CONTROL__MIN | |
| ZRTOS_VFS_MODULE_SPI_CONTROL__CLOCK_RATE_4 | chip clock/4
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__CLOCK_RATE_16 | chip clock/16
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__CLOCK_RATE_64 | chip clock/64
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__CLOCK_RATE_128 | chip clock/128
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__CLOCK_RATE_MASK | mask
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__MODE_MASTER | |
| ZRTOS_VFS_MODULE_SPI_CONTROL__MODE_SLAVE | |
| ZRTOS_VFS_MODULE_SPI_CONTROL__MODE_MASK | mask
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__BITORDER_LSB | send least significant bit (bit 0) first
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__BITORDER_MSB | send most significant bit (bit 7) first
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__BITORDER_MASK | mask
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__PP_0 | Sample (Rising) Setup (Falling) CPOL=0, CPHA=0.
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__PP_1 | Setup (Rising) Sample (Falling) CPOL=0, CPHA=1.
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__PP_2 | Sample (Falling) Setup (Rising) CPOL=1, CPHA=0.
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__PP_3 | Setup (Falling) Sample (Rising) CPOL=1, CPHA=1.
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__PP_MASK | mask
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__ENABLE | enable spi
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__ENABLE_INTERRUPT | enable interrupt
|
| ZRTOS_VFS_MODULE_SPI_CONTROL__MAX | |
#define ZRTOS_TYPES__UINT8_MIN
#define ZRTOS_BINARY__00001100
#define ZRTOS_BINARY__01000000
Setup (Falling) Sample (Rising) CPOL=1, CPHA=1.
Sample (Rising) Setup (Falling) CPOL=0, CPHA=0.
#define ZRTOS_BINARY__00000011
#define ZRTOS_BINARY__00001000
#define ZRTOS_BINARY__00000001
zrtos_vfs_module_spi_control_t
#define ZRTOS_BINARY__00010000
#define ZRTOS_BINARY__10000000
#define ZRTOS_BINARY__00100000
Setup (Rising) Sample (Falling) CPOL=0, CPHA=1.
send most significant bit (bit 7) first
send least significant bit (bit 0) first
#define ZRTOS_BINARY__00000010
Sample (Falling) Setup (Rising) CPOL=1, CPHA=0.
#define ZRTOS_TYPES__UINT8_MAX
#define ZRTOS_BINARY__00000100
#define ZRTOS_BINARY__00000000